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Company: AMD
Location: Austin, TX
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_



THE ROLE:

We are seeking a seasoned engineer with deep expertise in System-on-Chip (SoC) virtual and functional model development using C++. This role focuses on building, extending, and validating high-fidelity SoC models to support early firmware development, verification, and architecture exploration. You will serve as both a power user and validation lead, ensuring model accuracy, robustness, and seamless integration into simulation environments. You'll also contribute to firmware development and debugging efforts.

THE PERSON:

A highly experienced C++ developer with a strong background in hardware modeling and simulation. You thrive in pre-silicon development environments, possess a solid understanding of SoC architecture, and are comfortable collaborating across firmware, software, and hardware teams. You bring leadership in validation strategy and a passion for enabling early-stage platform development.

 

KEY RESPONSIBILITIES:

  • Implement transaction-level SoC functional models in C++ for firmware validation
  • Build reusable modeling infrastructure for CPU, interconnects, peripherals, and system-level components
  • Define and evolve simulation environments, modeling frameworks, and APIs
  • Collaborate with architecture and hardware teams to ensure functional and timing fidelity
  • Lead model verification and validation strategies including unit testing, regression, and RTL correlation
  • Partner with firmware/software/hardware teams to support pre-silicon development and platform bring-up
  • Develop and debug SoC firmware functions such as power management, security, and data transfer

 

PREFERRED EXPERIENCE:

  • Experience with C++ development experience in hardware modeling or simulation
  • Proven expertise in SystemC/TLM or equivalent high-level modeling frameworks
  • Experience with virtual platform tools (e.g., Synopsys Virtualizer, Cadence VSP, QEMU, gem5)
  • Strong understanding of CPU architecture, memory hierarchy, buses, and peripheral IPs
  • Skilled in simulation debugging and model integration
  • Familiarity with RTL design (Verilog/SystemVerilog) and verification methodologies (UVM)
  • Proficient in scripting languages like Python or Perl for automation
  • Exposure to firmware/software bring-up on virtual platforms
  • Demonstrated leadership in validation and cross-functional collaboration
  • Comfortable working in fast-paced, pre-silicon environments

 

ACADEMIC CREDENTIALS:

Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field

#LI-KW1

 



Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.


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