Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
Join AMD's cutting-edge hardware engineering organization focused on validating and optimizing next-generation high-speed interconnects that power AI, data center, and networking platforms. As a key member of this cross-functional validation team, you will drive the characterization, measurement, and optimization of industry-leading technologies such as PCIe Gen6/7 and Ethernet 224G per lane.
You will work hands-on in a world-class lab environment equipped with advanced test and measurement tools, collaborating closely with silicon design, packaging, and platform teams to ensure exceptional end-to-end signal and power integrity performance. This is an opportunity to innovate at the forefront of electrical and optical interconnect evolution — shaping the next generation of 400G+ solutions that define the future of computing performance and efficiency.
THE PERSON:
The ideal candidate is a detail-oriented engineer with a deep curiosity about how signals behave at the fastest speeds possible. You thrive in a collaborative, multidisciplinary setting, and you're comfortable bridging theory with hands-on lab validation. You communicate technical findings clearly, enjoy problem-solving complex hardware challenges, and are proactive in driving continuous improvement across design and validation cycles.
KEY RESPONSIBILITIES:
• Plan and execute SI/PI validation for next-generation interconnects (PCIe Gen6/7, 224G Ethernet, optical/copper channels)
• Perform end-to-end measurements including eye diagram, jitter, insertion loss, and return loss using oscilloscopes, VNAs, and TDRs
• Develop comprehensive lab validation plans for connectors, cables, and PCB interconnects, ensuring compliance and reliability
• Collaborate with hardware, layout, and packaging teams to provide actionable design feedback and drive SI/PI improvements
• Partner with silicon, firmware, and platform validation teams to optimize overall system-level performance
• Investigate and evaluate future interconnect technologies including CPO/CPC and 400G+ solutions
• Debug and resolve board- and system-level SI/PI issues, performing detailed root cause analysis and recommending mitigations
PREFERRED EXPERIENCE:
• Strong background in high-speed SI/PI validation, characterization, or simulation
• Proficiency with measurement equipment (oscilloscopes, VNAs, TDRs, BERTs)
• Familiarity with simulation and analysis tools such as Keysight ADS, Ansys HFSS/SIwave, Mentor HyperLynx, or CST
• Understanding of transmission line theory, SerDes architectures, and channel modeling
• Experience with PCIe, Ethernet, or xGMI interconnect standards
• Exposure to optical transceiver validation, CPO/CPC, or Linear Drive Optics
• Scripting or automation experience (Python, MATLAB, LabVIEW)
ACADEMIC CREDENTIALS:
• M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or a related technical discipline preferred
LOCATION:
Santa Clara, California
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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