Principal Engineer, Power Systems Design – Datacenter GPU Job Listing at AMD in Santa Clara, CA (Job ID 70617-en-us)

Description

WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

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THE ROLE:

As a Principal Engineer in Power Systems Design Engineering within the Datacenter and GPU Accelerated Processing (DCGPU) Division, you will lead advanced power system design activities for AMD product boards. You'll be part of the DCGPU Platform Power Design Team, which architects and delivers world-class platforms based on AMD's Instinct GPUs. Our team plays a central role in shaping every graphics board AMD brings to market, designing cutting-edge power converters that maximize performance, efficiency, and responsiveness.

This role offers the opportunity to collaborate with silicon design, packaging, board design, signal integrity, thermal/mechanical, validation, and manufacturing teams, as well as leaders across AMD, customers, suppliers, and partners. You'll also engage directly with power component vendors to influence and implement next-generation technologies.

THE PERSON:

The ideal candidate is a technical leader with deep expertise in power electronics and system-level board design, combined with strong business acumen and strategic thinking. You thrive in a fast-paced, collaborative environment and have the ability to influence across teams and organizations. You are both detail-oriented and visionary — able to balance architecture, design execution, and long-term technology strategy. A natural mentor, you enjoy guiding engineers, developing talent, and driving continuous improvement.

KEY RESPONSIBILITIES:

• Own the integrity of board power designs, including extractions, simulations, modeling, and vendor component reviews.
• Ensure accurate models are developed, correlated, and deployed across programs from feasibility through production.
• Lead the design and implementation of full power delivery networks (PDNs); model and validate impedance/droop targets; verify supply integrity by correlating simulations with lab and silicon measurements.
• Guide design teams on optimal component selection and layout execution.
• Collaborate with SoC and System Architects and external industry partners to drive innovation in power delivery technologies.
• Analyze, compare, and transition architectural solutions into implementation at the silicon, board, and system levels.
• Conduct feasibility studies and partner with development teams to deliver commercially viable solutions.
• Manage global, cross-functional assignments; motivate and guide a high-performance team.
• Build and maintain strong vendor relationships to advance technology development.
• Mentor and develop junior engineers, providing technical direction on simulation, validation, and design execution.
• Represent the Power Design Team in program and platform core teams, communicating vision and driving alignment.

PREFERRED EXPERIENCE:

• Strong technical expertise in power supply architectures and PDN design for server, OAM, and PCIe environments.
• Deep knowledge of multi-phase buck/buck-boost regulators, digital PWM controllers, bus converters, LDOs, PMICs, charge pumps, ADCs, and DACs.
• Skilled with analog circuit modeling and simulation tools (Simplis, PSpice, HSpice).
• Proficiency in 2D/2.5D EM simulation tools (e.g., Sigrity PowerDC, PowerSI, SiWave).
• Strong background in high-frequency magnetics design for power electronics.
• Solid understanding of control theory, closed loop compensation, stability analysis, and phase margin.
• Hands-on experience with PCB design and schematic capture tools such as Cadence Concept, Capture, and Allegro.
• Proficiency with lab equipment including oscilloscopes, e-loads, and function generators.
• Familiarity with high-speed signaling interfaces (PCIe Gen4/Gen5), PCB stack-ups, power and signal integrity, and bus topologies such as I2C, SMBUS, and PMBUS.
• Knowledge of AMD's SVIx power management interface.
• Strong written and verbal communication skills, with the ability to influence and align stakeholders.

ACADEMIC CREDENTIALS:

• Bachelor's degree in Electrical Engineering or related field preferred.
• Master's degree in Electrical Engineering or related field desired.

LOCATION: Santa Clara, CA

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Benefits offered are described:  AMD benefits at a glance.

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.