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Company: AMD
Location: Santa Clara, CA
Career Level: Mid-Senior Level
Industries: Technology, Software, IT, Electronics

Description



WHAT YOU DO AT AMD CHANGES EVERYTHING

We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. 

AMD together we advance_



THE ROLE: 

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's graphics processor IP, resulting in no bugs in the final design.  

 

THE PERSON:  

The ideal person for this role is passionate about modern complex processor architecture, digital design, and verification, and is skilled in collaboration and communication with engineers across various sites and time zones. This candidate should possess strong analytical and problem-solving abilities and be willing to learn and tackle new challenges. They are highly articulate and have excellent written and oral communication skills, with the ability to provide clear, logical presentations and documentation. A persistent open-minded attitude and the ability to learn from mistakes are crucial qualities for this position. The ideal candidate thrives in a team environment, can work with limited supervision, and has a strong sense of task scheduling, consistently delivering on time and achieving committed milestones.

 

KEY RESPONSIBILITY:

  • Implement high speed IO controller blocks based on architectural requirement.
  • Conduct design reviews of designs in technical presentations to peers and management
  • Develop RTL code for high-speed IO controller blocks in Verilog HDL and make sure functional correct and reusable for different configurations.
  • Oversees Synthesis and netlist delivery that meets timing, area and power bounding box. Assist the physical design team on the floor-planning and timing closure.
  • Work with the Design Verification team to ensure quality for architecture definition and design implementation.

 

PREFERRED EXPERIENCE:

  • Strong knowledge in computer architecture and interconnects.
  • Strong experience in high-speed IO controller design (e.g. USB, PCIe, SATA, Thunderbolt). USB and/or Thunderbolt a strong plus.
  • Experience in full ASIC design cycle: requirements definition, architectural and micro-architectural specification, RTL, design verification, floor-planning, synthesis, timing closure, post-silicon validation
  • Expert on Verilog RTL design and has experience of large digital ASIC project.
  • Familiar with front-end EDA tools and flows.
  • Familiar with Unix/Linux and scripts (TCL, Perl, ruby etc.)

 

ACADEMIC CREDENTIALS:  

  • Bachelor's or master's degree in computer engineering/Electrical Engineering/Computer Engineering/ Computer Science

 

 

#LI-DP1

#LI-HYBRID



Benefits offered are described:  AMD benefits at a glance.

 

AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law.   We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.


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