
Description
WHAT YOU DO AT AMD CHANGES EVERYTHING
We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences – the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives.
AMD together we advance_
THE ROLE:
The Graphic Memory Controller (GMC) is an IP that delivers into all SOCs that are shipped by AMD's Radeon Technology Group. We deliver discrete graphics, Data Center GPUs and Game Console APUs using a flexible controller design as the base for all our IP. We are looking for a design verification engineer in the Dram Controller IP at AMD's Santa Clara Design Center. You will be working in a fast-paced, complex environment where you will be challenged to provide elegant, robust solutions for increasingly complex features.
THE PERSON:
We are seeking a technically skilled design verification engineer who is adaptable, analytical, and committed to delivering high-quality solutions in a collaborative environment. The ideal candidate has a solid foundation in computer architecture, ASIC design, and verification methodologies such as UVM and System Verilog. They bring strong debugging and problem-solving skills, value teamwork, and are eager to contribute to the development of advanced memory system components. This role offers the opportunity to work alongside experienced engineers to create scalable and reliable IP for high-performance graphics products.
KEY RESPONSIBILITIES:
- Be a key member of our ASIC Verification team verifying the design and implementation of the memory system components in the industry's leading GPUs! Engaging work with our highly skilled group of architects, designers, and pre- and post-silicon verification teams to accomplish your tasks.
- Test plan and execute test plan for various features.
- Develop/Enhance UVM testbench components like test-cases, monitors, scoreboards, sequencers, and sequences for new features/projects.
- Drive debug and closure of regression signatures using waveform viewer and output files; and collaborate with the RTL designers and testbench owners to fix bugs.
- Develop quality, timely and cost-effective solutions independently. Contribute to testbench and/or IT infrastructure, helping to build a reliable, scalable, and flexible verification environment.
- Develop AI tool to improve verification flow.
PREFERRED EXPERIENCE:
- Exposure to Computer Architecture, ASIC design and verification methodology is required.
- Good understanding of RTL design (Verilog/System Verilog).
- Fluency in Object Oriented Programming with C++ and/or System Verilog
- Strong debug, analytical, and problem-solving skills with passion.
- Communication and collaboration skills to interact within our team and with cross functional teams.
- Hands-on experience with Assertion-based verification (SVA), formal Verification (FV), Unified Verification Methodology (UVM), and/or System Verilog checkers and scoreboards.
- Experience with Python and C/C++ programming language.
- Knowledge of DRAM controllers and DDR phys.
- Exposure to System Verilog/UVM verification concepts.
- Demonstrated passion for learning and applying new skills.
- Strong interpersonal skills with the ability and desire to be a great teammate.
ACADEMIC CREDENTIALS:
- Bachelor's or master's degree in computer engineering/Electrical Engineering
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Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
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